1. Field of the Invention
The present invention relates generally to internal power voltage generating circuits for semiconductor devices, and more particularly, to an internal power voltage generating circuit that uses a single drive transistor to reduce power consumption during stand-by mode and to reduce the transition time from stand-by mode to active mode.
2. Description of the Related Art
An internal power voltage generating circuit in a semiconductor memory device generates an internal power voltage which remains constant regardless of changes in the external power supply voltage. Considerable current flows through the internal power voltage generating circuit in order to supply a stable voltage to the semiconductor memory device.
When a semiconductor memory device operates in an active mode in which read and write operations are performed, it consumes significantly more current than in a standby mode during which it simply stores cell data. Continuous efforts have been made to reduce current consumption during standby mode.
A conventional internal power voltage generating circuit has separate output drivers and comparison circuits for standby and active modes. An additional circuit is required to turn the output driver for active mode completely off during standby mode. For example, the conventional internal power voltage generating circuit shown in FIG. 1, which will be described more thoroughly below, includes an additional transistor 20 which turns the active mode output driver 14 completely off during standby mode.
A problem with the conventional circuit of FIG. 1, however, is that the additional transistor 20 creates a current path through comparison circuit 10 during standby mode, thereby causing unnecessary current consumption during standby mode, Because the comparison circuit 10 is constructed with large transistors, a considerable amount of current flows through the comparison circuit 10 during standby mode.
An additional problem with the circuit of FIG. 1 is that it cannot switch quickly from standby mode to active mode because the output driver is turned completely off during standby mode.
FIG. 3 shows a conventional internal power voltage generating circuit having a PMOS output driver 34 and an additional transistor 38 for turning the output driver completely off during standby mode. As with the circuit of FIG. 1, the circuit of FIG. 3 cannot switch quickly from standby mode to active mode because the output driver 34 is turned completely off during standby mode.
Therefore, the conventional internal power voltage generating circuits of FIGS. 1 and 3 are not suitable for use in high-speed semiconductor memory devices.